v 20060113 1 B 400 100 5200 13900 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 5600 14100 8 10 1 1 0 6 1 refdes=U? T 400 14100 9 10 1 0 0 0 1 DDR2 T 400 14200 5 10 0 0 0 0 1 device=DDR2 T 400 14300 5 10 0 0 0 0 1 footprint=LQFP48 T 400 14100 5 10 0 0 0 0 1 author=Max Feoktistov T 400 14500 5 10 0 0 0 0 1 documentation=ddr2 T 400 14700 5 10 0 0 0 0 1 description=DDR2 T 400 14900 5 10 0 0 0 0 1 numslots=0 T 400 15100 5 10 0 0 0 0 1 dist-license=GPL (version 3 or later) T 400 15300 5 10 0 0 0 0 1 use-license=unlimited P 100 13600 400 13600 1 0 0 { T 300 13650 5 8 1 1 0 6 1 pinnumber=M8 T 300 13550 5 8 0 1 0 8 1 pinseq=M8 T 450 13600 9 8 1 1 0 0 1 pinlabel=A0 T 450 13600 5 8 0 1 0 2 1 pintype=io } P 100 13300 400 13300 1 0 0 { T 300 13350 5 8 1 1 0 6 1 pinnumber=M3 T 300 13250 5 8 0 1 0 8 1 pinseq=M3 T 450 13300 9 8 1 1 0 0 1 pinlabel=A1 T 450 13300 5 8 0 1 0 2 1 pintype=io } P 100 13000 400 13000 1 0 0 { T 300 13050 5 8 1 1 0 6 1 pinnumber=M7 T 300 12950 5 8 0 1 0 8 1 pinseq=M7 T 450 13000 9 8 1 1 0 0 1 pinlabel=A2 T 450 13000 5 8 0 1 0 2 1 pintype=io } P 100 12700 400 12700 1 0 0 { T 300 12750 5 8 1 1 0 6 1 pinnumber=N2 T 300 12650 5 8 0 1 0 8 1 pinseq=N2 T 450 12700 9 8 1 1 0 0 1 pinlabel=A3 T 450 12700 5 8 0 1 0 2 1 pintype=io } P 100 12400 400 12400 1 0 0 { T 300 12450 5 8 1 1 0 6 1 pinnumber=N8 T 300 12350 5 8 0 1 0 8 1 pinseq=N8 T 450 12400 9 8 1 1 0 0 1 pinlabel=A4 T 450 12400 5 8 0 1 0 2 1 pintype=io } P 100 12100 400 12100 1 0 0 { T 300 12150 5 8 1 1 0 6 1 pinnumber=N3 T 300 12050 5 8 0 1 0 8 1 pinseq=N3 T 450 12100 9 8 1 1 0 0 1 pinlabel=A5 T 450 12100 5 8 0 1 0 2 1 pintype=io } P 100 11800 400 11800 1 0 0 { T 300 11850 5 8 1 1 0 6 1 pinnumber=N7 T 300 11750 5 8 0 1 0 8 1 pinseq=N7 T 450 11800 9 8 1 1 0 0 1 pinlabel=A6 T 450 11800 5 8 0 1 0 2 1 pintype=io } P 100 11500 400 11500 1 0 0 { T 300 11550 5 8 1 1 0 6 1 pinnumber=P2 T 300 11450 5 8 0 1 0 8 1 pinseq=P2 T 450 11500 9 8 1 1 0 0 1 pinlabel=A7 T 450 11500 5 8 0 1 0 2 1 pintype=io } P 100 11200 400 11200 1 0 0 { T 300 11250 5 8 1 1 0 6 1 pinnumber=P8 T 300 11150 5 8 0 1 0 8 1 pinseq=P8 T 450 11200 9 8 1 1 0 0 1 pinlabel=A8 T 450 11200 5 8 0 1 0 2 1 pintype=io } P 100 10900 400 10900 1 0 0 { T 300 10950 5 8 1 1 0 6 1 pinnumber=P3 T 300 10850 5 8 0 1 0 8 1 pinseq=P3 T 450 10900 9 8 1 1 0 0 1 pinlabel=A9 T 450 10900 5 8 0 1 0 2 1 pintype=io } P 100 10600 400 10600 1 0 0 { T 300 10650 5 8 1 1 0 6 1 pinnumber=M2 T 300 10550 5 8 0 1 0 8 1 pinseq=M2 T 450 10600 9 8 1 1 0 0 1 pinlabel=A10 T 450 10600 5 8 0 1 0 2 1 pintype=io } P 100 10300 400 10300 1 0 0 { T 300 10350 5 8 1 1 0 6 1 pinnumber=P7 T 300 10250 5 8 0 1 0 8 1 pinseq=P7 T 450 10300 9 8 1 1 0 0 1 pinlabel=A11 T 450 10300 5 8 0 1 0 2 1 pintype=io } P 100 10000 400 10000 1 0 0 { T 300 10050 5 8 1 1 0 6 1 pinnumber=R2 T 300 9950 5 8 0 1 0 8 1 pinseq=R2 T 450 10000 9 8 1 1 0 0 1 pinlabel=A12 T 450 10000 5 8 0 1 0 2 1 pintype=io } P 100 9700 400 9700 1 0 0 { T 300 9750 5 8 1 1 0 6 1 pinnumber=L2 T 300 9650 5 8 0 1 0 8 1 pinseq=L2 T 450 9700 9 8 1 1 0 0 1 pinlabel=BA0 T 450 9700 5 8 0 1 0 2 1 pintype=io } P 100 9400 400 9400 1 0 0 { T 300 9450 5 8 1 1 0 6 1 pinnumber=L3 T 300 9350 5 8 0 1 0 8 1 pinseq=L3 T 450 9400 9 8 1 1 0 0 1 pinlabel=BA1 T 450 9400 5 8 0 1 0 2 1 pintype=io } P 100 9100 400 9100 1 0 0 { T 300 9150 5 8 1 1 0 6 1 pinnumber=L1 T 300 9050 5 8 0 1 0 8 1 pinseq=L1 T 450 9100 9 8 1 1 0 0 1 pinlabel=BA2 T 450 9100 5 8 0 1 0 2 1 pintype=io } P 100 8800 400 8800 1 0 0 { T 300 8850 5 8 1 1 0 6 1 pinnumber=L7 T 300 8750 5 8 0 1 0 8 1 pinseq=L7 T 450 8800 9 8 1 1 0 0 1 pinlabel=CAS# T 450 8800 5 8 0 1 0 2 1 pintype=io } P 100 8500 400 8500 1 0 0 { T 300 8550 5 8 1 1 0 6 1 pinnumber=J8 T 300 8450 5 8 0 1 0 8 1 pinseq=J8 T 450 8500 9 8 1 1 0 0 1 pinlabel=CK T 450 8500 5 8 0 1 0 2 1 pintype=io } P 100 8200 400 8200 1 0 0 { T 300 8250 5 8 1 1 0 6 1 pinnumber=K8 T 300 8150 5 8 0 1 0 8 1 pinseq=K8 T 450 8200 9 8 1 1 0 0 1 pinlabel=CK# T 450 8200 5 8 0 1 0 2 1 pintype=io } P 100 7900 400 7900 1 0 0 { T 300 7950 5 8 1 1 0 6 1 pinnumber=K2 T 300 7850 5 8 0 1 0 8 1 pinseq=K2 T 450 7900 9 8 1 1 0 0 1 pinlabel=CKE T 450 7900 5 8 0 1 0 2 1 pintype=io } P 100 7600 400 7600 1 0 0 { T 300 7650 5 8 1 1 0 6 1 pinnumber=L8 T 300 7550 5 8 0 1 0 8 1 pinseq=L8 T 450 7600 9 8 1 1 0 0 1 pinlabel=CS# T 450 7600 5 8 0 1 0 2 1 pintype=io } P 100 7300 400 7300 1 0 0 { T 300 7350 5 8 1 1 0 6 1 pinnumber=G8 T 300 7250 5 8 0 1 0 8 1 pinseq=G8 T 450 7300 9 8 1 1 0 0 1 pinlabel=DQ0 T 450 7300 5 8 0 1 0 2 1 pintype=io } P 100 7000 400 7000 1 0 0 { T 300 7050 5 8 1 1 0 6 1 pinnumber=G2 T 300 6950 5 8 0 1 0 8 1 pinseq=G2 T 450 7000 9 8 1 1 0 0 1 pinlabel=DQ1 T 450 7000 5 8 0 1 0 2 1 pintype=io } P 100 6700 400 6700 1 0 0 { T 300 6750 5 8 1 1 0 6 1 pinnumber=H7 T 300 6650 5 8 0 1 0 8 1 pinseq=H7 T 450 6700 9 8 1 1 0 0 1 pinlabel=DQ2 T 450 6700 5 8 0 1 0 2 1 pintype=io } P 100 6400 400 6400 1 0 0 { T 300 6450 5 8 1 1 0 6 1 pinnumber=H3 T 300 6350 5 8 0 1 0 8 1 pinseq=H3 T 450 6400 9 8 1 1 0 0 1 pinlabel=DQ3 T 450 6400 5 8 0 1 0 2 1 pintype=io } P 100 6100 400 6100 1 0 0 { T 300 6150 5 8 1 1 0 6 1 pinnumber=H1 T 300 6050 5 8 0 1 0 8 1 pinseq=H1 T 450 6100 9 8 1 1 0 0 1 pinlabel=DQ4 T 450 6100 5 8 0 1 0 2 1 pintype=io } P 100 5800 400 5800 1 0 0 { T 300 5850 5 8 1 1 0 6 1 pinnumber=H9 T 300 5750 5 8 0 1 0 8 1 pinseq=H9 T 450 5800 9 8 1 1 0 0 1 pinlabel=DQ5 T 450 5800 5 8 0 1 0 2 1 pintype=io } P 100 5500 400 5500 1 0 0 { T 300 5550 5 8 1 1 0 6 1 pinnumber=F1 T 300 5450 5 8 0 1 0 8 1 pinseq=F1 T 450 5500 9 8 1 1 0 0 1 pinlabel=DQ6 T 450 5500 5 8 0 1 0 2 1 pintype=io } P 100 5200 400 5200 1 0 0 { T 300 5250 5 8 1 1 0 6 1 pinnumber=F9 T 300 5150 5 8 0 1 0 8 1 pinseq=F9 T 450 5200 9 8 1 1 0 0 1 pinlabel=DQ7 T 450 5200 5 8 0 1 0 2 1 pintype=io } P 100 4900 400 4900 1 0 0 { T 300 4950 5 8 1 1 0 6 1 pinnumber=C8 T 300 4850 5 8 0 1 0 8 1 pinseq=C8 T 450 4900 9 8 1 1 0 0 1 pinlabel=DQ8 T 450 4900 5 8 0 1 0 2 1 pintype=io } P 100 4600 400 4600 1 0 0 { T 300 4650 5 8 1 1 0 6 1 pinnumber=C2 T 300 4550 5 8 0 1 0 8 1 pinseq=C2 T 450 4600 9 8 1 1 0 0 1 pinlabel=DQ9 T 450 4600 5 8 0 1 0 2 1 pintype=io } P 100 4300 400 4300 1 0 0 { T 300 4350 5 8 1 1 0 6 1 pinnumber=D7 T 300 4250 5 8 0 1 0 8 1 pinseq=D7 T 450 4300 9 8 1 1 0 0 1 pinlabel=DQ10 T 450 4300 5 8 0 1 0 2 1 pintype=io } P 100 4000 400 4000 1 0 0 { T 300 4050 5 8 1 1 0 6 1 pinnumber=D3 T 300 3950 5 8 0 1 0 8 1 pinseq=D3 T 450 4000 9 8 1 1 0 0 1 pinlabel=DQ11 T 450 4000 5 8 0 1 0 2 1 pintype=io } P 100 3700 400 3700 1 0 0 { T 300 3750 5 8 1 1 0 6 1 pinnumber=D1 T 300 3650 5 8 0 1 0 8 1 pinseq=D1 T 450 3700 9 8 1 1 0 0 1 pinlabel=DQ12 T 450 3700 5 8 0 1 0 2 1 pintype=io } P 100 3400 400 3400 1 0 0 { T 300 3450 5 8 1 1 0 6 1 pinnumber=D9 T 300 3350 5 8 0 1 0 8 1 pinseq=D9 T 450 3400 9 8 1 1 0 0 1 pinlabel=DQ13 T 450 3400 5 8 0 1 0 2 1 pintype=io } P 100 3100 400 3100 1 0 0 { T 300 3150 5 8 1 1 0 6 1 pinnumber=B1 T 300 3050 5 8 0 1 0 8 1 pinseq=B1 T 450 3100 9 8 1 1 0 0 1 pinlabel=DQ14 T 450 3100 5 8 0 1 0 2 1 pintype=io } P 100 2800 400 2800 1 0 0 { T 300 2850 5 8 1 1 0 6 1 pinnumber=B9 T 300 2750 5 8 0 1 0 8 1 pinseq=B9 T 450 2800 9 8 1 1 0 0 1 pinlabel=DQ15 T 450 2800 5 8 0 1 0 2 1 pintype=io } P 100 2500 400 2500 1 0 0 { T 300 2550 5 8 1 1 0 6 1 pinnumber=F3 T 300 2450 5 8 0 1 0 8 1 pinseq=F3 T 450 2500 9 8 1 1 0 0 1 pinlabel=LDM T 450 2500 5 8 0 1 0 2 1 pintype=io } P 100 2200 400 2200 1 0 0 { T 300 2250 5 8 1 1 0 6 1 pinnumber=F7 T 300 2150 5 8 0 1 0 8 1 pinseq=F7 T 450 2200 9 8 1 1 0 0 1 pinlabel=LDQS T 450 2200 5 8 0 1 0 2 1 pintype=io } P 100 1900 400 1900 1 0 0 { T 300 1950 5 8 1 1 0 6 1 pinnumber=E8 T 300 1850 5 8 0 1 0 8 1 pinseq=E8 T 450 1900 9 8 1 1 0 0 1 pinlabel=LDQS#/NU T 450 1900 5 8 0 1 0 2 1 pintype=io } P 100 1600 400 1600 1 0 0 { T 300 1650 5 8 1 1 0 6 1 pinnumber=A2 T 300 1550 5 8 0 1 0 8 1 pinseq=A2 T 450 1600 9 8 1 1 0 0 1 pinlabel=NC T 450 1600 5 8 0 1 0 2 1 pintype=io } P 100 1300 400 1300 1 0 0 { T 300 1350 5 8 1 1 0 6 1 pinnumber=E2 T 300 1250 5 8 0 1 0 8 1 pinseq=E2 T 450 1300 9 8 1 1 0 0 1 pinlabel=NC T 450 1300 5 8 0 1 0 2 1 pintype=io } P 100 1000 400 1000 1 0 0 { T 300 1050 5 8 1 1 0 6 1 pinnumber=K9 T 300 950 5 8 0 1 0 8 1 pinseq=K9 T 450 1000 9 8 1 1 0 0 1 pinlabel=ODT T 450 1000 5 8 0 1 0 2 1 pintype=io } P 100 700 400 700 1 0 0 { T 300 750 5 8 1 1 0 6 1 pinnumber=K7 T 300 650 5 8 0 1 0 8 1 pinseq=K7 T 450 700 9 8 1 1 0 0 1 pinlabel=RAS# T 450 700 5 8 0 1 0 2 1 pintype=io } P 100 400 400 400 1 0 0 { T 300 450 5 8 1 1 0 6 1 pinnumber=R3 T 300 350 5 8 0 1 0 8 1 pinseq=R3 T 450 400 9 8 1 1 0 0 1 pinlabel=RFU T 450 400 5 8 0 1 0 2 1 pintype=io } P 5900 13600 5600 13600 1 0 0 { T 5700 13650 5 8 1 1 0 0 1 pinnumber=R7 T 5700 13550 5 8 0 1 0 2 1 pinseq=R7 T 5550 13600 9 8 1 1 0 6 1 pinlabel=RFU T 5550 13600 5 8 0 1 0 8 1 pintype=io } P 5900 13300 5600 13300 1 0 0 { T 5700 13350 5 8 1 1 0 0 1 pinnumber=R8 T 5700 13250 5 8 0 1 0 2 1 pinseq=R8 T 5550 13300 9 8 1 1 0 6 1 pinlabel=RFU T 5550 13300 5 8 0 1 0 8 1 pintype=io } P 5900 13000 5600 13000 1 0 0 { T 5700 13050 5 8 1 1 0 0 1 pinnumber=B3 T 5700 12950 5 8 0 1 0 2 1 pinseq=B3 T 5550 13000 9 8 1 1 0 6 1 pinlabel=UDM T 5550 13000 5 8 0 1 0 8 1 pintype=io } P 5900 12700 5600 12700 1 0 0 { T 5700 12750 5 8 1 1 0 0 1 pinnumber=B7 T 5700 12650 5 8 0 1 0 2 1 pinseq=B7 T 5550 12700 9 8 1 1 0 6 1 pinlabel=UDQS T 5550 12700 5 8 0 1 0 8 1 pintype=io } P 5900 12400 5600 12400 1 0 0 { T 5700 12450 5 8 1 1 0 0 1 pinnumber=A8 T 5700 12350 5 8 0 1 0 2 1 pinseq=A8 T 5550 12400 9 8 1 1 0 6 1 pinlabel=UDQS#/NU T 5550 12400 5 8 0 1 0 8 1 pintype=io } P 5900 12100 5600 12100 1 0 0 { T 5700 12150 5 8 1 1 0 0 1 pinnumber=A1 T 5700 12050 5 8 0 1 0 2 1 pinseq=A1 T 5550 12100 9 8 1 1 0 6 1 pinlabel=VDD T 5550 12100 5 8 0 1 0 8 1 pintype=io } P 5900 11800 5600 11800 1 0 0 { T 5700 11850 5 8 1 1 0 0 1 pinnumber=E1 T 5700 11750 5 8 0 1 0 2 1 pinseq=E1 T 5550 11800 9 8 1 1 0 6 1 pinlabel=VDD T 5550 11800 5 8 0 1 0 8 1 pintype=io } P 5900 11500 5600 11500 1 0 0 { T 5700 11550 5 8 1 1 0 0 1 pinnumber=J9 T 5700 11450 5 8 0 1 0 2 1 pinseq=J9 T 5550 11500 9 8 1 1 0 6 1 pinlabel=VDD T 5550 11500 5 8 0 1 0 8 1 pintype=io } P 5900 11200 5600 11200 1 0 0 { T 5700 11250 5 8 1 1 0 0 1 pinnumber=M9 T 5700 11150 5 8 0 1 0 2 1 pinseq=M9 T 5550 11200 9 8 1 1 0 6 1 pinlabel=VDD T 5550 11200 5 8 0 1 0 8 1 pintype=io } P 5900 10900 5600 10900 1 0 0 { T 5700 10950 5 8 1 1 0 0 1 pinnumber=R1 T 5700 10850 5 8 0 1 0 2 1 pinseq=R1 T 5550 10900 9 8 1 1 0 6 1 pinlabel=VDD T 5550 10900 5 8 0 1 0 8 1 pintype=io } P 5900 10600 5600 10600 1 0 0 { T 5700 10650 5 8 1 1 0 0 1 pinnumber=J1 T 5700 10550 5 8 0 1 0 2 1 pinseq=J1 T 5550 10600 9 8 1 1 0 6 1 pinlabel=VDDL T 5550 10600 5 8 0 1 0 8 1 pintype=io } P 5900 10300 5600 10300 1 0 0 { T 5700 10350 5 8 1 1 0 0 1 pinnumber=A9 T 5700 10250 5 8 0 1 0 2 1 pinseq=A9 T 5550 10300 9 8 1 1 0 6 1 pinlabel=VDDQ T 5550 10300 5 8 0 1 0 8 1 pintype=io } P 5900 10000 5600 10000 1 0 0 { T 5700 10050 5 8 1 1 0 0 1 pinnumber=C1 T 5700 9950 5 8 0 1 0 2 1 pinseq=C1 T 5550 10000 9 8 1 1 0 6 1 pinlabel=VDDQ T 5550 10000 5 8 0 1 0 8 1 pintype=io } P 5900 9700 5600 9700 1 0 0 { T 5700 9750 5 8 1 1 0 0 1 pinnumber=C3 T 5700 9650 5 8 0 1 0 2 1 pinseq=C3 T 5550 9700 9 8 1 1 0 6 1 pinlabel=VDDQ T 5550 9700 5 8 0 1 0 8 1 pintype=io } P 5900 9400 5600 9400 1 0 0 { T 5700 9450 5 8 1 1 0 0 1 pinnumber=C7 T 5700 9350 5 8 0 1 0 2 1 pinseq=C7 T 5550 9400 9 8 1 1 0 6 1 pinlabel=VDDQ T 5550 9400 5 8 0 1 0 8 1 pintype=io } P 5900 9100 5600 9100 1 0 0 { T 5700 9150 5 8 1 1 0 0 1 pinnumber=C9 T 5700 9050 5 8 0 1 0 2 1 pinseq=C9 T 5550 9100 9 8 1 1 0 6 1 pinlabel=VDDQ T 5550 9100 5 8 0 1 0 8 1 pintype=io } P 5900 8800 5600 8800 1 0 0 { T 5700 8850 5 8 1 1 0 0 1 pinnumber=E9 T 5700 8750 5 8 0 1 0 2 1 pinseq=E9 T 5550 8800 9 8 1 1 0 6 1 pinlabel=VDDQ T 5550 8800 5 8 0 1 0 8 1 pintype=io } P 5900 8500 5600 8500 1 0 0 { T 5700 8550 5 8 1 1 0 0 1 pinnumber=G1 T 5700 8450 5 8 0 1 0 2 1 pinseq=G1 T 5550 8500 9 8 1 1 0 6 1 pinlabel=VDDQ T 5550 8500 5 8 0 1 0 8 1 pintype=io } P 5900 8200 5600 8200 1 0 0 { T 5700 8250 5 8 1 1 0 0 1 pinnumber=G3 T 5700 8150 5 8 0 1 0 2 1 pinseq=G3 T 5550 8200 9 8 1 1 0 6 1 pinlabel=VDDQ T 5550 8200 5 8 0 1 0 8 1 pintype=io } P 5900 7900 5600 7900 1 0 0 { T 5700 7950 5 8 1 1 0 0 1 pinnumber=G7 T 5700 7850 5 8 0 1 0 2 1 pinseq=G7 T 5550 7900 9 8 1 1 0 6 1 pinlabel=VDDQ T 5550 7900 5 8 0 1 0 8 1 pintype=io } P 5900 7600 5600 7600 1 0 0 { T 5700 7650 5 8 1 1 0 0 1 pinnumber=G9 T 5700 7550 5 8 0 1 0 2 1 pinseq=G9 T 5550 7600 9 8 1 1 0 6 1 pinlabel=VDDQ T 5550 7600 5 8 0 1 0 8 1 pintype=io } P 5900 7300 5600 7300 1 0 0 { T 5700 7350 5 8 1 1 0 0 1 pinnumber=J2 T 5700 7250 5 8 0 1 0 2 1 pinseq=J2 T 5550 7300 9 8 1 1 0 6 1 pinlabel=VREF T 5550 7300 5 8 0 1 0 8 1 pintype=io } P 5900 7000 5600 7000 1 0 0 { T 5700 7050 5 8 1 1 0 0 1 pinnumber=A3 T 5700 6950 5 8 0 1 0 2 1 pinseq=A3 T 5550 7000 9 8 1 1 0 6 1 pinlabel=VSS T 5550 7000 5 8 0 1 0 8 1 pintype=io } P 5900 6700 5600 6700 1 0 0 { T 5700 6750 5 8 1 1 0 0 1 pinnumber=E3 T 5700 6650 5 8 0 1 0 2 1 pinseq=E3 T 5550 6700 9 8 1 1 0 6 1 pinlabel=VSS T 5550 6700 5 8 0 1 0 8 1 pintype=io } P 5900 6400 5600 6400 1 0 0 { T 5700 6450 5 8 1 1 0 0 1 pinnumber=J3 T 5700 6350 5 8 0 1 0 2 1 pinseq=J3 T 5550 6400 9 8 1 1 0 6 1 pinlabel=VSS T 5550 6400 5 8 0 1 0 8 1 pintype=io } P 5900 6100 5600 6100 1 0 0 { T 5700 6150 5 8 1 1 0 0 1 pinnumber=N1 T 5700 6050 5 8 0 1 0 2 1 pinseq=N1 T 5550 6100 9 8 1 1 0 6 1 pinlabel=VSS T 5550 6100 5 8 0 1 0 8 1 pintype=io } P 5900 5800 5600 5800 1 0 0 { T 5700 5850 5 8 1 1 0 0 1 pinnumber=P9 T 5700 5750 5 8 0 1 0 2 1 pinseq=P9 T 5550 5800 9 8 1 1 0 6 1 pinlabel=VSS T 5550 5800 5 8 0 1 0 8 1 pintype=io } P 5900 5500 5600 5500 1 0 0 { T 5700 5550 5 8 1 1 0 0 1 pinnumber=J7 T 5700 5450 5 8 0 1 0 2 1 pinseq=J7 T 5550 5500 9 8 1 1 0 6 1 pinlabel=VSSDL T 5550 5500 5 8 0 1 0 8 1 pintype=io } P 5900 5200 5600 5200 1 0 0 { T 5700 5250 5 8 1 1 0 0 1 pinnumber=A7 T 5700 5150 5 8 0 1 0 2 1 pinseq=A7 T 5550 5200 9 8 1 1 0 6 1 pinlabel=VSSQ T 5550 5200 5 8 0 1 0 8 1 pintype=io } P 5900 4900 5600 4900 1 0 0 { T 5700 4950 5 8 1 1 0 0 1 pinnumber=B2 T 5700 4850 5 8 0 1 0 2 1 pinseq=B2 T 5550 4900 9 8 1 1 0 6 1 pinlabel=VSSQ T 5550 4900 5 8 0 1 0 8 1 pintype=io } P 5900 4600 5600 4600 1 0 0 { T 5700 4650 5 8 1 1 0 0 1 pinnumber=B8 T 5700 4550 5 8 0 1 0 2 1 pinseq=B8 T 5550 4600 9 8 1 1 0 6 1 pinlabel=VSSQ T 5550 4600 5 8 0 1 0 8 1 pintype=io } P 5900 4300 5600 4300 1 0 0 { T 5700 4350 5 8 1 1 0 0 1 pinnumber=D2 T 5700 4250 5 8 0 1 0 2 1 pinseq=D2 T 5550 4300 9 8 1 1 0 6 1 pinlabel=VSSQ T 5550 4300 5 8 0 1 0 8 1 pintype=io } P 5900 4000 5600 4000 1 0 0 { T 5700 4050 5 8 1 1 0 0 1 pinnumber=D8 T 5700 3950 5 8 0 1 0 2 1 pinseq=D8 T 5550 4000 9 8 1 1 0 6 1 pinlabel=VSSQ T 5550 4000 5 8 0 1 0 8 1 pintype=io } P 5900 3700 5600 3700 1 0 0 { T 5700 3750 5 8 1 1 0 0 1 pinnumber=E7 T 5700 3650 5 8 0 1 0 2 1 pinseq=E7 T 5550 3700 9 8 1 1 0 6 1 pinlabel=VSSQ T 5550 3700 5 8 0 1 0 8 1 pintype=io } P 5900 3400 5600 3400 1 0 0 { T 5700 3450 5 8 1 1 0 0 1 pinnumber=F2 T 5700 3350 5 8 0 1 0 2 1 pinseq=F2 T 5550 3400 9 8 1 1 0 6 1 pinlabel=VSSQ T 5550 3400 5 8 0 1 0 8 1 pintype=io } P 5900 3100 5600 3100 1 0 0 { T 5700 3150 5 8 1 1 0 0 1 pinnumber=F8 T 5700 3050 5 8 0 1 0 2 1 pinseq=F8 T 5550 3100 9 8 1 1 0 6 1 pinlabel=VSSQ T 5550 3100 5 8 0 1 0 8 1 pintype=io } P 5900 2800 5600 2800 1 0 0 { T 5700 2850 5 8 1 1 0 0 1 pinnumber=H2 T 5700 2750 5 8 0 1 0 2 1 pinseq=H2 T 5550 2800 9 8 1 1 0 6 1 pinlabel=VSSQ T 5550 2800 5 8 0 1 0 8 1 pintype=io } P 5900 2500 5600 2500 1 0 0 { T 5700 2550 5 8 1 1 0 0 1 pinnumber=H8 T 5700 2450 5 8 0 1 0 2 1 pinseq=H8 T 5550 2500 9 8 1 1 0 6 1 pinlabel=VSSQ T 5550 2500 5 8 0 1 0 8 1 pintype=io } P 5900 2200 5600 2200 1 0 0 { T 5700 2250 5 8 1 1 0 0 1 pinnumber=K3 T 5700 2150 5 8 0 1 0 2 1 pinseq=K3 T 5550 2200 9 8 1 1 0 6 1 pinlabel=WE# T 5550 2200 5 8 0 1 0 8 1 pintype=io } P 5900 1900 5600 1900 1 0 0 { T 5700 1950 5 8 1 1 0 0 1 pinnumber=A1 T 5700 1850 5 8 0 1 0 2 1 pinseq=A1 T 5550 1900 9 8 1 1 0 6 1 pinlabel=VDD T 5550 1900 5 8 0 1 0 8 1 pintype=io } P 5900 1600 5600 1600 1 0 0 { T 5700 1650 5 8 1 1 0 0 1 pinnumber=A1 T 5700 1550 5 8 0 1 0 2 1 pinseq=A1 T 5550 1600 9 8 1 1 0 6 1 pinlabel=VDD T 5550 1600 5 8 0 1 0 8 1 pintype=io } P 5900 1300 5600 1300 1 0 0 { T 5700 1350 5 8 1 1 0 0 1 pinnumber=A1 T 5700 1250 5 8 0 1 0 2 1 pinseq=A1 T 5550 1300 9 8 1 1 0 6 1 pinlabel=VDD T 5550 1300 5 8 0 1 0 8 1 pintype=io } P 5900 1000 5600 1000 1 0 0 { T 5700 1050 5 8 1 1 0 0 1 pinnumber=A1 T 5700 950 5 8 0 1 0 2 1 pinseq=A1 T 5550 1000 9 8 1 1 0 6 1 pinlabel=VDD T 5550 1000 5 8 0 1 0 8 1 pintype=io } P 5900 700 5600 700 1 0 0 { T 5700 750 5 8 1 1 0 0 1 pinnumber=A1 T 5700 650 5 8 0 1 0 2 1 pinseq=A1 T 5550 700 9 8 1 1 0 6 1 pinlabel=VDD T 5550 700 5 8 0 1 0 8 1 pintype=io } P 5900 400 5600 400 1 0 0 { T 5700 450 5 8 1 1 0 0 1 pinnumber=A1 T 5700 350 5 8 0 1 0 2 1 pinseq=A1 T 5550 400 9 8 1 1 0 6 1 pinlabel=VDD T 5550 400 5 8 0 1 0 8 1 pintype=io }